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dc:creator <https://dblp.l3s.de/d2r/resource/authors/Randal_E._Bryant>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sanjit_A._Seshia>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shuvendu_K._Lahiri>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F3-540-45657-0%5F7>
foaf:homepage <https://doi.org/10.1007/3-540-45657-0_7>
dc:identifier DBLP conf/cav/BryantLS02 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F3-540-45657-0%5F7 (xsd:string)
dcterms:issued 2002 (xsd:gYear)
rdfs:label Modeling and Verifying Systems Using a Logic of Counter Arithmetic with Lambda Expressions and Uninterpreted Functions. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Randal_E._Bryant>
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foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shuvendu_K._Lahiri>
swrc:pages 78-92 (xsd:string)
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rdfs:seeAlso <https://doi.org/10.1007/3-540-45657-0_7>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/cav>
dc:title Modeling and Verifying Systems Using a Logic of Counter Arithmetic with Lambda Expressions and Uninterpreted Functions. (xsd:string)
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rdf:type swrc:InProceedings
rdf:type foaf:Document