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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ccece/Al-ObaidyAM19a>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Arghavan_Asad>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Farah_Mohammadi_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Furat_Al-Obaidy>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FCCECE.2019.8861876>
foaf:homepage <https://doi.org/10.1109/CCECE.2019.8861876>
dc:identifier DBLP conf/ccece/Al-ObaidyAM19a (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FCCECE.2019.8861876 (xsd:string)
dcterms:issued 2019 (xsd:gYear)
rdfs:label Reconfigurable Hybrid Cache Hierarchy in 3D Chip-Multi Processors Based on a Convex optimization Method. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Arghavan_Asad>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Farah_Mohammadi_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Furat_Al-Obaidy>
swrc:pages 1-6 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ccece/2019>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ccece/Al-ObaidyAM19a/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ccece/Al-ObaidyAM19a>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ccece/ccece2019.html#Al-ObaidyAM19a>
rdfs:seeAlso <https://doi.org/10.1109/CCECE.2019.8861876>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ccece>
dc:title Reconfigurable Hybrid Cache Hierarchy in 3D Chip-Multi Processors Based on a Convex optimization Method. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document