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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/cf/ChiuCS10>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ding-Siang_Su>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jih-Ching_Chiu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yu-Liang_Chou>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1787275.1787291>
foaf:homepage <https://doi.org/10.1145/1787275.1787291>
dc:identifier DBLP conf/cf/ChiuCS10 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1787275.1787291 (xsd:string)
dcterms:issued 2010 (xsd:gYear)
rdfs:label A hyperscalar multi-core architecture. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ding-Siang_Su>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jih-Ching_Chiu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yu-Liang_Chou>
swrc:pages 77-78 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/cf/2010>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/cf/ChiuCS10/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/cf/ChiuCS10>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/cf/cf2010.html#ChiuCS10>
rdfs:seeAlso <https://doi.org/10.1145/1787275.1787291>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/cf>
dc:subject chip multiprocessors, cmps, dynamic multi-core chips, reconfigurable multi-core architectures (xsd:string)
dc:title A hyperscalar multi-core architecture. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document