Compiler-directed frequency and voltage scaling for a multiple clock domain microarchitecture.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/cf/RangasamyNS08
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2008
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Compiler-directed frequency and voltage scaling for a multiple clock domain microarchitecture.
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dvs, dynamic energy, energy, multiple clock domains
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Compiler-directed frequency and voltage scaling for a multiple clock domain microarchitecture.
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