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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/cf/SuriA09>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Aneesh_Aggarwal>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tameesh_Suri>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1531743.1531768>
foaf:homepage <https://doi.org/10.1145/1531743.1531768>
dc:identifier DBLP conf/cf/SuriA09 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1531743.1531768 (xsd:string)
dcterms:issued 2009 (xsd:gYear)
rdfs:label Improving performance of simple cores by exploiting loop-level parallelism through value prediction and reconfiguration. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Aneesh_Aggarwal>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tameesh_Suri>
swrc:pages 151-160 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/cf/2009>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/cf/SuriA09/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/cf/SuriA09>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/cf/cf2009.html#SuriA09>
rdfs:seeAlso <https://doi.org/10.1145/1531743.1531768>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/cf>
dc:subject data value prediction, dynamic reconfiguration, loop level parallelism (xsd:string)
dc:title Improving performance of simple cores by exploiting loop-level parallelism through value prediction and reconfiguration. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document