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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/cgo/KochBF10>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Bj%E2%88%9A%E2%88%82rn_Franke>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Igor_B%E2%88%9A%E2%88%82hm>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tobias_J._K._Edler_von_Koch>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1772954.1772980>
foaf:homepage <https://doi.org/10.1145/1772954.1772980>
dc:identifier DBLP conf/cgo/KochBF10 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1772954.1772980 (xsd:string)
dcterms:issued 2010 (xsd:gYear)
rdfs:label Integrated instruction selection and register allocation for compact code generation exploiting freeform mixing of 16- and 32-bit instructions. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Bj%E2%88%9A%E2%88%82rn_Franke>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Igor_B%E2%88%9A%E2%88%82hm>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tobias_J._K._Edler_von_Koch>
swrc:pages 180-189 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/cgo/2010>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/cgo/KochBF10/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/cgo/KochBF10>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/cgo/cgo2010.html#KochBF10>
rdfs:seeAlso <https://doi.org/10.1145/1772954.1772980>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/cgo>
dc:subject ARCompact, code size, dual instruction set architecture, instruction selection, register allocation, variable-length instructions (xsd:string)
dc:title Integrated instruction selection and register allocation for compact code generation exploiting freeform mixing of 16- and 32-bit instructions. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document