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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/chdl/NavabiHEV93>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Amirhooshang_Hashemi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mankuan_Michael_Vai>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Massoud_Eghtesad>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zainalabedin_Navabi>
dc:identifier DBLP conf/chdl/NavabiHEV93 (xsd:string)
dcterms:issued 1993 (xsd:gYear)
rdfs:label Modeling Timing Behavior of Logic Circuits Using Piecewise Linear Models. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Amirhooshang_Hashemi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mankuan_Michael_Vai>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Massoud_Eghtesad>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zainalabedin_Navabi>
swrc:pages 569-586 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/chdl/1993>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/chdl/NavabiHEV93/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/chdl/NavabiHEV93>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/chdl/chdl1993.html#NavabiHEV93>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/chdl>
dc:title Modeling Timing Behavior of Logic Circuits Using Piecewise Linear Models. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document