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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ches/FournierMLMT03>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/George_S._Taylor>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Huiyun_Li>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jacques_J._A._Fournier>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Robert_D._Mullins>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Simon_W._Moore>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-540-45238-6%5F12>
foaf:homepage <https://doi.org/10.1007/978-3-540-45238-6_12>
dc:identifier DBLP conf/ches/FournierMLMT03 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-540-45238-6%5F12 (xsd:string)
dcterms:issued 2003 (xsd:gYear)
rdfs:label Security Evaluation of Asynchronous Circuits. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/George_S._Taylor>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Huiyun_Li>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jacques_J._A._Fournier>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Robert_D._Mullins>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Simon_W._Moore>
swrc:pages 137-151 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ches/2003>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ches/FournierMLMT03/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ches/FournierMLMT03>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ches/ches2003.html#FournierMLMT03>
rdfs:seeAlso <https://doi.org/10.1007/978-3-540-45238-6_12>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ches>
dc:subject Asynchronous circuits, Dual-Rail encoding, Power Analysis, EMA, Fault Analysis, Design-time security evaluation (xsd:string)
dc:title Security Evaluation of Asynchronous Circuits. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document