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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ches/KuoV01>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Henry_Kuo>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ingrid_Verbauwhede>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F3-540-44709-1%5F6>
foaf:homepage <https://doi.org/10.1007/3-540-44709-1_6>
dc:identifier DBLP conf/ches/KuoV01 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F3-540-44709-1%5F6 (xsd:string)
dcterms:issued 2001 (xsd:gYear)
rdfs:label Architectural Optimization for a 1.82Gbits/sec VLSI Implementation of the AES Rijndael Algorithm. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Henry_Kuo>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ingrid_Verbauwhede>
swrc:pages 51-64 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ches/2001>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ches/KuoV01/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ches/KuoV01>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ches/ches2001.html#KuoV01>
rdfs:seeAlso <https://doi.org/10.1007/3-540-44709-1_6>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ches>
dc:title Architectural Optimization for a 1.82Gbits/sec VLSI Implementation of the AES Rijndael Algorithm. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document