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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/chinacom/DingRZWZZ19>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Fusheng_Zhu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Haoqi_Ren>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jun_Wu_0006>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Peng_Ding>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Wenru_Zhang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zhifeng_Zhang>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-030-41114-5%5F56>
foaf:homepage <https://doi.org/10.1007/978-3-030-41114-5_56>
dc:identifier DBLP conf/chinacom/DingRZWZZ19 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-030-41114-5%5F56 (xsd:string)
dcterms:issued 2019 (xsd:gYear)
rdfs:label Design and Implementation of Assembler for High Performance Digital Signal Processor (DSP). (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Fusheng_Zhu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Haoqi_Ren>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jun_Wu_0006>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Peng_Ding>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Wenru_Zhang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zhifeng_Zhang>
swrc:pages 741-751 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/chinacom/2019-1>
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rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/chinacom/chinacom2019-1.html#DingRZWZZ19>
rdfs:seeAlso <https://doi.org/10.1007/978-3-030-41114-5_56>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/chinacom>
dc:title Design and Implementation of Assembler for High Performance Digital Signal Processor (DSP). (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document