A million gate PLD with 622 MHz I/O interface, multiple PLLs and high performance embedded CAM.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/cicc/CheungCACGKKLOS00
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A million gate PLD with 622 MHz I/O interface, multiple PLLs and high performance embedded CAM.
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A million gate PLD with 622 MHz I/O interface, multiple PLLs and high performance embedded CAM.
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