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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/cicc/ChinosiZG99>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Carlo_Guardiani>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mauro_Chinosi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Roberto_Zafalon>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FCICC.1999.777238>
foaf:homepage <https://doi.org/10.1109/CICC.1999.777238>
dc:identifier DBLP conf/cicc/ChinosiZG99 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FCICC.1999.777238 (xsd:string)
dcterms:issued 1999 (xsd:gYear)
rdfs:label Fast and accurate power verification of a Viterbi decoder IP based on mixed-level power simulation technique with automatic spatio-temporal circuit partitioning. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Carlo_Guardiani>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mauro_Chinosi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Roberto_Zafalon>
swrc:pages 31-34 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/cicc/1999>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/cicc/ChinosiZG99/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/cicc/ChinosiZG99>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/cicc/cicc1999.html#ChinosiZG99>
rdfs:seeAlso <https://doi.org/10.1109/CICC.1999.777238>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/cicc>
dc:title Fast and accurate power verification of a Viterbi decoder IP based on mixed-level power simulation technique with automatic spatio-temporal circuit partitioning. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document