Giga bit per second per pin differential CMOS circuits for pseudo ECL signaling.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/cicc/DjahanshahiHS99
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Giga bit per second per pin differential CMOS circuits for pseudo ECL signaling.
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Giga bit per second per pin differential CMOS circuits for pseudo ECL signaling.
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