A versatile low-jitter PLL in 90-nm CMOS for SerDes transmitter clocking.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/cicc/LokeBWOMKBZAPCV05
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A versatile low-jitter PLL in 90-nm CMOS for SerDes transmitter clocking.
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A versatile low-jitter PLL in 90-nm CMOS for SerDes transmitter clocking.
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