A digital pulse width modulation closed loop control LDMOS gate driver for LED drivers implemented in a 0.18 őľm HV CMOS technology.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/cicc/StracheRDHZWH17
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/cicc/StracheRDHZWH17
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Leo_Rolff
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Michael_Hanhart
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Ralf_Wunderlich
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Sebastian_Strache
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Stefan_Dietrich
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Stefan_Heinen
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Tobias_Zekorn
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FCICC.2017.7993618
>
foaf:
homepage
<
https://doi.org/10.1109/CICC.2017.7993618
>
dc:
identifier
DBLP conf/cicc/StracheRDHZWH17
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FCICC.2017.7993618
(xsd:string)
dcterms:
issued
2017
(xsd:gYear)
rdfs:
label
A digital pulse width modulation closed loop control LDMOS gate driver for LED drivers implemented in a 0.18 őľm HV CMOS technology.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Leo_Rolff
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Michael_Hanhart
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Ralf_Wunderlich
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Sebastian_Strache
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Stefan_Dietrich
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Stefan_Heinen
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Tobias_Zekorn
>
swrc:
pages
1-4
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/cicc/2017
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/cicc/StracheRDHZWH17/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/cicc/StracheRDHZWH17
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/cicc/cicc2017.html#StracheRDHZWH17
>
rdfs:
seeAlso
<
https://doi.org/10.1109/CICC.2017.7993618
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/cicc
>
dc:
title
A digital pulse width modulation closed loop control LDMOS gate driver for LED drivers implemented in a 0.18 őľm HV CMOS technology.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document