Performance Evaluation of Various RISC Processor Systems: A Case Study on ARM, MIPS and RISC-V.
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/cloud2/LiuYX21
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Cheng-Zhong_Xu_0001
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Kejiang_Ye
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Yu_Liu
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1007%2F978-3-030-96326-2%5F5
>
foaf:
homepage
<
https://doi.org/10.1007/978-3-030-96326-2_5
>
dc:
identifier
DBLP conf/cloud2/LiuYX21
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1007%2F978-3-030-96326-2%5F5
(xsd:string)
dcterms:
issued
2021
(xsd:gYear)
rdfs:
label
Performance Evaluation of Various RISC Processor Systems: A Case Study on ARM, MIPS and RISC-V.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Cheng-Zhong_Xu_0001
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Kejiang_Ye
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Yu_Liu
>
swrc:
pages
61-74
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/cloud2/2021
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/cloud2/LiuYX21/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/cloud2/LiuYX21
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/cloud2/cloud2021.html#LiuYX21
>
rdfs:
seeAlso
<
https://doi.org/10.1007/978-3-030-96326-2_5
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/cloud2
>
dc:
title
Performance Evaluation of Various RISC Processor Systems: A Case Study on ARM, MIPS and RISC-V.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document