[RDF data]
Home | Example Publications
PropertyValue
dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/codes/IwatoSTI07>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hirofumi_Iwato>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Keishi_Sakanushi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Masaharu_Imai>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yoshinori_Takeuchi>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1289816.1289872>
foaf:homepage <https://doi.org/10.1145/1289816.1289872>
dc:identifier DBLP conf/codes/IwatoSTI07 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1289816.1289872 (xsd:string)
dcterms:issued 2007 (xsd:gYear)
rdfs:label A low power VLIW processor generation method by means of extracting non-redundant activation conditions. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hirofumi_Iwato>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Keishi_Sakanushi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Masaharu_Imai>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yoshinori_Takeuchi>
swrc:pages 227-232 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/codes/2007>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/codes/IwatoSTI07/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/codes/IwatoSTI07>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/codes/codes2007.html#IwatoSTI07>
rdfs:seeAlso <https://doi.org/10.1145/1289816.1289872>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/codes>
dc:subject ASIP, VLIW processor, clock gating, low power (xsd:string)
dc:title A low power VLIW processor generation method by means of extracting non-redundant activation conditions. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document