A time-predictable system initialization design for huge-capacity flash-memory storage systems. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dcterms:bibliographicCitation	<http://dblp.uni-trier.de/rec/bibtex/conf/codes/Wu08>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Chin-Hsien_Wu>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1145%2F1450135.1450140>
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dc:identifier	DBLP conf/codes/Wu08 (xsd:string)
dc:identifier	DOI doi.org%2F10.1145%2F1450135.1450140 (xsd:string)
dcterms:issued	2008 (xsd:gYear)
rdfs:label	A time-predictable system initialization design for huge-capacity flash-memory storage systems. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Chin-Hsien_Wu>
swrc:pages	13-18 (xsd:string)
dcterms:partOf	<https://dblp.l3s.de/d2r/resource/publications/conf/codes/2008>
owl:sameAs	<http://bibsonomy.org/uri/bibtexkey/conf/codes/Wu08/dblp>
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rdfs:seeAlso	<http://dblp.uni-trier.de/db/conf/codes/codes2008.html#Wu08>
rdfs:seeAlso	<https://doi.org/10.1145/1450135.1450140>
swrc:series	<https://dblp.l3s.de/d2r/resource/conferences/codes>
dc:subject	embedded systems, flash memory, flash translation layer, storage systems (xsd:string)
dc:title	A time-predictable system initialization design for huge-capacity flash-memory storage systems. (xsd:string)
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