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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/coolchips/WangOIUA12>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hideharu_Amano>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kimiyoshi_Usami>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Weihan_Wang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yoshifumi_Ishii>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yuya_Ohta>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FCOOLChips.2012.6216587>
foaf:homepage <https://doi.org/10.1109/COOLChips.2012.6216587>
dc:identifier DBLP conf/coolchips/WangOIUA12 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FCOOLChips.2012.6216587 (xsd:string)
dcterms:issued 2012 (xsd:gYear)
rdfs:label Trade-off analysis of fine-grained power gating methods for functional units in a CPU. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hideharu_Amano>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kimiyoshi_Usami>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Weihan_Wang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yoshifumi_Ishii>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yuya_Ohta>
swrc:pages 1-3 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/coolchips/2012>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/coolchips/WangOIUA12/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/coolchips/WangOIUA12>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/coolchips/coolchips2012.html#WangOIUA12>
rdfs:seeAlso <https://doi.org/10.1109/COOLChips.2012.6216587>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/coolchips>
dc:title Trade-off analysis of fine-grained power gating methods for functional units in a CPU. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document