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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/dac/BinhISH96>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Akichika_Shiomi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Masaharu_Imai>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Nguyen-Ngoc_B%E2%88%9A%C2%A8nh>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Nobuyuki_Hikichi>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F240518.240618>
foaf:homepage <https://doi.org/10.1145/240518.240618>
dc:identifier DBLP conf/dac/BinhISH96 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F240518.240618 (xsd:string)
dcterms:issued 1996 (xsd:gYear)
rdfs:label A Hardware/Software Partitioning Algorithm for Designing Pipelined ASIPs with Least Gate Counts. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Akichika_Shiomi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Masaharu_Imai>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Nguyen-Ngoc_B%E2%88%9A%C2%A8nh>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Nobuyuki_Hikichi>
swrc:pages 527-532 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/dac/1996>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/dac/BinhISH96/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/dac/BinhISH96>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/dac/dac96.html#BinhISH96>
rdfs:seeAlso <https://doi.org/10.1145/240518.240618>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/dac>
dc:title A Hardware/Software Partitioning Algorithm for Designing Pipelined ASIPs with Least Gate Counts. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document