A Hardware/Software Partitioning Algorithm for Designing Pipelined ASIPs with Least Gate Counts.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/dac/BinhISH96
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A Hardware/Software Partitioning Algorithm for Designing Pipelined ASIPs with Least Gate Counts.
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A Hardware/Software Partitioning Algorithm for Designing Pipelined ASIPs with Least Gate Counts.
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