An integrated nonlinear placement framework with congestion and porosity aware buffer planning.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/dac/ChenCP08
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2008
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An integrated nonlinear placement framework with congestion and porosity aware buffer planning.
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VLSI, buffer, physical design, placement
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An integrated nonlinear placement framework with congestion and porosity aware buffer planning.
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