Hierarchical bottom--up analog optimization methodology validated by a delta-sigma A/D converter design for the 802.11a/b/g standard.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/dac/EeckelaertSGSS06
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/dac/EeckelaertSGSS06
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Georges_G._E._Gielen
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Michiel_Steyaert
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Raf_Schoofs
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Tom_Eeckelaert
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Willy_M._C._Sansen
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1145%2F1146909.1146920
>
foaf:
homepage
<
https://doi.org/10.1145/1146909.1146920
>
dc:
identifier
DBLP conf/dac/EeckelaertSGSS06
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1145%2F1146909.1146920
(xsd:string)
dcterms:
issued
2006
(xsd:gYear)
rdfs:
label
Hierarchical bottom--up analog optimization methodology validated by a delta-sigma A/D converter design for the 802.11a/b/g standard.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Georges_G._E._Gielen
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Michiel_Steyaert
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Raf_Schoofs
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Tom_Eeckelaert
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Willy_M._C._Sansen
>
swrc:
pages
25-30
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/dac/2006
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/dac/EeckelaertSGSS06/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/dac/EeckelaertSGSS06
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/dac/dac2006.html#EeckelaertSGSS06
>
rdfs:
seeAlso
<
https://doi.org/10.1145/1146909.1146920
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/dac
>
dc:
subject
hierarchical synthesis
(xsd:string)
dc:
title
Hierarchical bottom--up analog optimization methodology validated by a delta-sigma A/D converter design for the 802.11a/b/g standard.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document