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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/dac/HaquePJP10>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Andhi_Janapsatya>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jorgen_Peddersen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mohammad_Shihabul_Haque>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sri_Parameswaran>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1837274.1837364>
foaf:homepage <https://doi.org/10.1145/1837274.1837364>
dc:identifier DBLP conf/dac/HaquePJP10 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1837274.1837364 (xsd:string)
dcterms:issued 2010 (xsd:gYear)
rdfs:label SCUD: a fast single-pass L1 cache simulation approach for embedded processors with round-robin replacement policy. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Andhi_Janapsatya>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jorgen_Peddersen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mohammad_Shihabul_Haque>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sri_Parameswaran>
swrc:pages 356-361 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/dac/2010>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/dac/HaquePJP10/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/dac/HaquePJP10>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/dac/dac2010.html#HaquePJP10>
rdfs:seeAlso <https://doi.org/10.1145/1837274.1837364>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/dac>
dc:subject L1 cache, cache simulation, miss rate, round robin, simulation (xsd:string)
dc:title SCUD: a fast single-pass L1 cache simulation approach for embedded processors with round-robin replacement policy. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document