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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/dac/HoCCC05>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chen-Feng_Chang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sao-Jie_Chen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tsung-Yi_Ho>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yao-Wen_Chang>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1065579.1065734>
foaf:homepage <https://doi.org/10.1145/1065579.1065734>
dc:identifier DBLP conf/dac/HoCCC05 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1065579.1065734 (xsd:string)
dcterms:issued 2005 (xsd:gYear)
rdfs:label Multilevel full-chip routing for the X-based architecture. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chen-Feng_Chang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sao-Jie_Chen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tsung-Yi_Ho>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yao-Wen_Chang>
swrc:pages 597-602 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/dac/2005>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/dac/HoCCC05/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/dac/HoCCC05>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/dac/dac2005.html#HoCCC05>
rdfs:seeAlso <https://doi.org/10.1145/1065579.1065734>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/dac>
dc:subject Xarchitecture, multilevel optimization, physical design, routing (xsd:string)
dc:title Multilevel full-chip routing for the X-based architecture. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document