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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/dac/IhrigMJ10>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Alex_K._Jones>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Colin_J._Ihrig>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rami_G._Melhem>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1837274.1837383>
foaf:homepage <https://doi.org/10.1145/1837274.1837383>
dc:identifier DBLP conf/dac/IhrigMJ10 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1837274.1837383 (xsd:string)
dcterms:issued 2010 (xsd:gYear)
rdfs:label Automated modeling and emulation of interconnect designs for many-core chip multiprocessors. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Alex_K._Jones>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Colin_J._Ihrig>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rami_G._Melhem>
swrc:pages 431-436 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/dac/2010>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/dac/IhrigMJ10/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/dac/IhrigMJ10>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/dac/dac2010.html#IhrigMJ10>
rdfs:seeAlso <https://doi.org/10.1145/1837274.1837383>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/dac>
dc:subject emulation, interconnection network, many-core, multi-core, simulation (xsd:string)
dc:title Automated modeling and emulation of interconnect designs for many-core chip multiprocessors. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document