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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/dac/JainB91>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Alok_Jain>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Randal_E._Bryant>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F127601.127668>
foaf:homepage <https://doi.org/10.1145/127601.127668>
dc:identifier DBLP conf/dac/JainB91 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F127601.127668 (xsd:string)
dcterms:issued 1991 (xsd:gYear)
rdfs:label Mapping Switch-Level Simulation onto Gate-Level Hardware Accelerators. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Alok_Jain>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Randal_E._Bryant>
swrc:pages 219-222 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/dac/1991>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/dac/JainB91/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/dac/JainB91>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/dac/dac91.html#JainB91>
rdfs:seeAlso <https://doi.org/10.1145/127601.127668>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/dac>
dc:title Mapping Switch-Level Simulation onto Gate-Level Hardware Accelerators. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document