A timing-driven module-based chip design flow.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/dac/MoB04
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/dac/MoB04
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Fan_Mo
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Robert_K._Brayton
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1145%2F996566.996585
>
foaf:
homepage
<
https://doi.org/10.1145/996566.996585
>
dc:
identifier
DBLP conf/dac/MoB04
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1145%2F996566.996585
(xsd:string)
dcterms:
issued
2004
(xsd:gYear)
rdfs:
label
A timing-driven module-based chip design flow.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Fan_Mo
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Robert_K._Brayton
>
swrc:
pages
67-70
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/dac/2004
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/dac/MoB04/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/dac/MoB04
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/dac/dac2004.html#MoB04
>
rdfs:
seeAlso
<
https://doi.org/10.1145/996566.996585
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/dac
>
dc:
subject
design flow, physical synthesis, timing constraints
(xsd:string)
dc:
title
A timing-driven module-based chip design flow.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document