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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/dac/MukhopadhyayRR03>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Arijit_Raychowdhury>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kaushik_Roy_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Saibal_Mukhopadhyay>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F775832.775877>
foaf:homepage <https://doi.org/10.1145/775832.775877>
dc:identifier DBLP conf/dac/MukhopadhyayRR03 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F775832.775877 (xsd:string)
dcterms:issued 2003 (xsd:gYear)
rdfs:label Accurate estimation of total leakage current in scaled CMOS logic circuits based on compact current modeling. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Arijit_Raychowdhury>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kaushik_Roy_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Saibal_Mukhopadhyay>
swrc:pages 169-174 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/dac/2003>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/dac/MukhopadhyayRR03/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/dac/MukhopadhyayRR03>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/dac/dac2003.html#MukhopadhyayRR03>
rdfs:seeAlso <https://doi.org/10.1145/775832.775877>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/dac>
dc:subject doping profiles, leakage, threshold voltage, tunneling (xsd:string)
dc:title Accurate estimation of total leakage current in scaled CMOS logic circuits based on compact current modeling. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document