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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/dac/OzdemirPDMLC10>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Abhishek_Das>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Alok_N._Choudhary>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Gabriel_H._Loh>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Gokhan_Memik>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Serkan_Ozdemir>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yan_Pan>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1837274.1837312>
foaf:homepage <https://doi.org/10.1145/1837274.1837312>
dc:identifier DBLP conf/dac/OzdemirPDMLC10 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1837274.1837312 (xsd:string)
dcterms:issued 2010 (xsd:gYear)
rdfs:label Quantifying and coping with parametric variations in 3D-stacked microarchitectures. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Abhishek_Das>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Alok_N._Choudhary>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Gabriel_H._Loh>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Gokhan_Memik>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Serkan_Ozdemir>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yan_Pan>
swrc:pages 144-149 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/dac/2010>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/dac/OzdemirPDMLC10/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/dac/OzdemirPDMLC10>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/dac/dac2010.html#OzdemirPDMLC10>
rdfs:seeAlso <https://doi.org/10.1145/1837274.1837312>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/dac>
dc:subject 3D integration, cache architectures, process variations, processor pipeline (xsd:string)
dc:title Quantifying and coping with parametric variations in 3D-stacked microarchitectures. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document