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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/dac/ParkGMRR12>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Anand_Raghunathan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kaushik_Roy_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Niladri_Narayan_Mojumder>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sang_Phill_Park>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sumeet_Kumar_Gupta>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F2228360.2228447>
foaf:homepage <https://doi.org/10.1145/2228360.2228447>
dc:identifier DBLP conf/dac/ParkGMRR12 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F2228360.2228447 (xsd:string)
dcterms:issued 2012 (xsd:gYear)
rdfs:label Future cache design using STT MRAMs for improved energy efficiency: devices, circuits and architecture. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Anand_Raghunathan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kaushik_Roy_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Niladri_Narayan_Mojumder>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sang_Phill_Park>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sumeet_Kumar_Gupta>
swrc:pages 492-497 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/dac/2012>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/dac/ParkGMRR12/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/dac/ParkGMRR12>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/dac/dac2012.html#ParkGMRR12>
rdfs:seeAlso <https://doi.org/10.1145/2228360.2228447>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/dac>
dc:title Future cache design using STT MRAMs for improved energy efficiency: devices, circuits and architecture. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document