Floorplan-aware automated synthesis of bus-based communication architectures.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/dac/PasrichaDBB05
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2005
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Floorplan-aware automated synthesis of bus-based communication architectures.
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communication synthesis, systems-on-chip
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Floorplan-aware automated synthesis of bus-based communication architectures.
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