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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/dac/RestucciaBMCB20>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Alessandro_Biondi_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Francesco_Restuccia_0002>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Giorgio_C._Buttazzo>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Giorgiomaria_Cicero>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mauro_Marinoni>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FDAC18072.2020.9218652>
foaf:homepage <https://doi.org/10.1109/DAC18072.2020.9218652>
dc:identifier DBLP conf/dac/RestucciaBMCB20 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FDAC18072.2020.9218652 (xsd:string)
dcterms:issued 2020 (xsd:gYear)
rdfs:label AXI HyperConnect: A Predictable, Hypervisor-level Interconnect for Hardware Accelerators in FPGA SoC. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Alessandro_Biondi_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Francesco_Restuccia_0002>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Giorgio_C._Buttazzo>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Giorgiomaria_Cicero>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mauro_Marinoni>
swrc:pages 1-6 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/dac/2020>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/dac/RestucciaBMCB20/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/dac/RestucciaBMCB20>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/dac/dac2020.html#RestucciaBMCB20>
rdfs:seeAlso <https://doi.org/10.1109/DAC18072.2020.9218652>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/dac>
dc:title AXI HyperConnect: A Predictable, Hypervisor-level Interconnect for Hardware Accelerators in FPGA SoC. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document