A dual-core 64b ultraSPARC microprocessor for dense server applications.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/dac/TakayanagiSPSL04
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2004
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A dual-core 64b ultraSPARC microprocessor for dense server applications.
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L2, NBTI, UltraSPARC, cache, coupling noise, deep submicron technology, dense server, dual-core, leakage, multiprocessor, negative bias temperature instability, throughput computing
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A dual-core 64b ultraSPARC microprocessor for dense server applications.
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