HaDeS: architectural synthesis for <u>h</u>eterogeneous <u>d</u>ark <u>s</u>ilicon chip multi-processors.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/dac/TurakhiaRGM13
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/dac/TurakhiaRGM13
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Bharathwaj_Raghunathan
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Diana_Marculescu
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Siddharth_Garg
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Yatish_Turakhia
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1145%2F2463209.2488948
>
foaf:
homepage
<
https://doi.org/10.1145/2463209.2488948
>
dc:
identifier
DBLP conf/dac/TurakhiaRGM13
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1145%2F2463209.2488948
(xsd:string)
dcterms:
issued
2013
(xsd:gYear)
rdfs:
label
HaDeS: architectural synthesis for <u>h</u>eterogeneous <u>d</u>ark <u>s</u>ilicon chip multi-processors.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Bharathwaj_Raghunathan
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Diana_Marculescu
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Siddharth_Garg
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Yatish_Turakhia
>
swrc:
pages
173:1-173:7
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/dac/2013
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/dac/TurakhiaRGM13/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/dac/TurakhiaRGM13
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/dac/dac2013.html#TurakhiaRGM13
>
rdfs:
seeAlso
<
https://doi.org/10.1145/2463209.2488948
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/dac
>
dc:
title
HaDeS: architectural synthesis for <u>h</u>eterogeneous <u>d</u>ark <u>s</u>ilicon chip multi-processors.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document