Systematic design of a 200 MS/s 8-bit interpolating/averaging A/D converter.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/dac/VandenbusscheULSG02
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2002
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Systematic design of a 200 MS/s 8-bit interpolating/averaging A/D converter.
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A/D converters, flash, interpolating, simulated annealing
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Systematic design of a 200 MS/s 8-bit interpolating/averaging A/D converter.
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