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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/dac/WeiCJRD98>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kaushik_Roy_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Liqiong_Wei>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mark_Johnson>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Vivek_De>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zhanping_Chen>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F277044.277179>
foaf:homepage <https://doi.org/10.1145/277044.277179>
dc:identifier DBLP conf/dac/WeiCJRD98 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F277044.277179 (xsd:string)
dcterms:issued 1998 (xsd:gYear)
rdfs:label Design and Optimization of Low Voltage High Performance Dual Threshold CMOS Circuits. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kaushik_Roy_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Liqiong_Wei>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mark_Johnson>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Vivek_De>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zhanping_Chen>
swrc:pages 489-494 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/dac/1998>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/dac/WeiCJRD98/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/dac/WeiCJRD98>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/dac/dac98.html#WeiCJRD98>
rdfs:seeAlso <https://doi.org/10.1145/277044.277179>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/dac>
dc:subject MPEG4, codec, design automatian, flip-flops, level converters, low power, placement, synthesis, voltage scaling (xsd:string)
dc:title Design and Optimization of Low Voltage High Performance Dual Threshold CMOS Circuits. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document