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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/dac/WuWL06>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Huaizhi_Wu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/I-Min_Liu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Martin_D._F._Wong>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1146909.1147023>
foaf:homepage <https://doi.org/10.1145/1146909.1147023>
dc:identifier DBLP conf/dac/WuWL06 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1146909.1147023 (xsd:string)
dcterms:issued 2006 (xsd:gYear)
rdfs:label Timing-constrained and voltage-island-aware voltage assignment. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Huaizhi_Wu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/I-Min_Liu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Martin_D._F._Wong>
swrc:pages 429-432 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/dac/2006>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/dac/WuWL06/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/dac/WuWL06>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/dac/dac2006.html#WuWL06>
rdfs:seeAlso <https://doi.org/10.1145/1146909.1147023>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/dac>
dc:subject low power, timing, voltage assignment, voronoi diagram (xsd:string)
dc:title Timing-constrained and voltage-island-aware voltage assignment. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document