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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/dac/XanthopoulosYC97>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Anantha_P._Chandrakasan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Thucydides_Xanthopoulos>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yoshifumi_Yaoi>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F266021.266184>
foaf:homepage <https://doi.org/10.1145/266021.266184>
dc:identifier DBLP conf/dac/XanthopoulosYC97 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F266021.266184 (xsd:string)
dcterms:issued 1997 (xsd:gYear)
rdfs:label Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Anantha_P._Chandrakasan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Thucydides_Xanthopoulos>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yoshifumi_Yaoi>
swrc:pages 415-420 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/dac/1997>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/dac/XanthopoulosYC97/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/dac/XanthopoulosYC97>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/dac/dac97.html#XanthopoulosYC97>
rdfs:seeAlso <https://doi.org/10.1145/266021.266184>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/dac>
dc:title Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document