TSV stress aware timing analysis with applications to 3D-IC layout optimization.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/dac/YangALLP10
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TSV stress aware timing analysis with applications to 3D-IC layout optimization.
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3DIC, TSV, mobility variation, stress, timing analysis
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TSV stress aware timing analysis with applications to 3D-IC layout optimization.
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