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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/dac/YingKKGGOTW09>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Andreas_Kuehlmann>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Eric_Grimme>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Geoffrey_Ying>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Georges_G._E._Gielen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kenneth_S._Kundert>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Martin_O%27Leary>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sandeep_Tare>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Warren_Wong>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1629911.1630046>
foaf:homepage <https://doi.org/10.1145/1629911.1630046>
dc:identifier DBLP conf/dac/YingKKGGOTW09 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1629911.1630046 (xsd:string)
dcterms:issued 2009 (xsd:gYear)
rdfs:label Guess, solder, measure, repeat: how do I get my mixed-signal chip right? (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Andreas_Kuehlmann>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Eric_Grimme>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Geoffrey_Ying>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Georges_G._E._Gielen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kenneth_S._Kundert>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Martin_O%27Leary>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sandeep_Tare>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Warren_Wong>
swrc:pages 520-521 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/dac/2009>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/dac/YingKKGGOTW09/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/dac/YingKKGGOTW09>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/dac/dac2009.html#YingKKGGOTW09>
rdfs:seeAlso <https://doi.org/10.1145/1629911.1630046>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/dac>
dc:subject SPICE, VHDL, Verilog, Verilog-AMS, analog behavioral modeling, functional verification, low power verification, mixed-signal verification, performance verification (xsd:string)
dc:title Guess, solder, measure, repeat: how do I get my mixed-signal chip right? (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document