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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/dac/ZengYGP09>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Dmitry_V._Ponomarev>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hui_Zeng>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kanad_Ghose>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Matt_T._Yourst>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1629911.1629974>
foaf:homepage <https://doi.org/10.1145/1629911.1629974>
dc:identifier DBLP conf/dac/ZengYGP09 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1629911.1629974 (xsd:string)
dcterms:issued 2009 (xsd:gYear)
rdfs:label MPTLsim: a simulator for X86 multicore processors. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Dmitry_V._Ponomarev>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hui_Zeng>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kanad_Ghose>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Matt_T._Yourst>
swrc:pages 226-231 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/dac/2009>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/dac/ZengYGP09/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/dac/ZengYGP09>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/dac/dac2009.html#ZengYGP09>
rdfs:seeAlso <https://doi.org/10.1145/1629911.1629974>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/dac>
dc:subject coherent cache, microprocessor, simulator (xsd:string)
dc:title MPTLsim: a simulator for X86 multicore processors. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document