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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/dac/ZhaoZD05>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chong_Zhao>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sujit_Dey>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yi_Zhao>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1065579.1065631>
foaf:homepage <https://doi.org/10.1145/1065579.1065631>
dc:identifier DBLP conf/dac/ZhaoZD05 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1065579.1065631 (xsd:string)
dcterms:issued 2005 (xsd:gYear)
rdfs:label Constraint-aware robustness insertion for optimal noise-tolerance enhancement in VLSI circuits. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chong_Zhao>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sujit_Dey>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yi_Zhao>
swrc:pages 190-195 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/dac/2005>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/dac/ZhaoZD05/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/dac/ZhaoZD05>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/dac/dac2005.html#ZhaoZD05>
rdfs:seeAlso <https://doi.org/10.1145/1065579.1065631>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/dac>
dc:subject circuit hardening, nanometer circuits, robustness calibration, robustness insertion (xsd:string)
dc:title Constraint-aware robustness insertion for optimal noise-tolerance enhancement in VLSI circuits. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document