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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/date/BaileyMBLA04>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Erich_Marschner>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jayaram_Bhasker>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jim_Lewis>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Peter_J._Ashenden>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Stephen_Bailey>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FDATE.2004.1269266>
foaf:homepage <https://doi.org/10.1109/DATE.2004.1269266>
dc:identifier DBLP conf/date/BaileyMBLA04 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FDATE.2004.1269266 (xsd:string)
dcterms:issued 2004 (xsd:gYear)
rdfs:label Improving Design and Verification Productivity with VHDL-200x. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Erich_Marschner>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jayaram_Bhasker>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jim_Lewis>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Peter_J._Ashenden>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Stephen_Bailey>
swrc:pages 332-335 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/date/2004>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/date/BaileyMBLA04/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/date/BaileyMBLA04>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/date/date2004-df.html#BaileyMBLA04>
rdfs:seeAlso <https://doi.org/10.1109/DATE.2004.1269266>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/date>
dc:title Improving Design and Verification Productivity with VHDL-200x. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document