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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/date/ChienCLMRM05>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Dong_Chen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Gin-Kou_Ma>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jea-Hong_Lou>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rob_A._Rutenbar>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tamal_Mukherjee>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yu-Tsun_Chien>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FDATE.2005.119>
foaf:homepage <https://doi.org/10.1109/DATE.2005.119>
dc:identifier DBLP conf/date/ChienCLMRM05 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FDATE.2005.119 (xsd:string)
dcterms:issued 2005 (xsd:gYear)
rdfs:label Designer-Driven Topology Optimization for Pipelined Analog to Digital Converters. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Dong_Chen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Gin-Kou_Ma>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jea-Hong_Lou>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rob_A._Rutenbar>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tamal_Mukherjee>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yu-Tsun_Chien>
swrc:pages 279-280 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/date/2005>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/date/ChienCLMRM05/dblp>
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rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/date/date2005.html#ChienCLMRM05>
rdfs:seeAlso <https://doi.org/10.1109/DATE.2005.119>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/date>
dc:title Designer-Driven Topology Optimization for Pipelined Analog to Digital Converters. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document