Architecture and optimization of associative memories used for the implementation of logic functions based on nanoelectronic 1S1R cells.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/date/HeittmannN18
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Architecture and optimization of associative memories used for the implementation of logic functions based on nanoelectronic 1S1R cells.
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Architecture and optimization of associative memories used for the implementation of logic functions based on nanoelectronic 1S1R cells.
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