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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/date/HeittmannN18>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Arne_Heittmann>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tobias_G._Noll>
foaf:homepage <http://dx.doi.org/doi.org%2F10.23919%2FDATE.2018.8342250>
foaf:homepage <https://doi.org/10.23919/DATE.2018.8342250>
dc:identifier DBLP conf/date/HeittmannN18 (xsd:string)
dc:identifier DOI doi.org%2F10.23919%2FDATE.2018.8342250 (xsd:string)
dcterms:issued 2018 (xsd:gYear)
rdfs:label Architecture and optimization of associative memories used for the implementation of logic functions based on nanoelectronic 1S1R cells. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Arne_Heittmann>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tobias_G._Noll>
swrc:pages 1496-1499 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/date/2018>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/date/HeittmannN18/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/date/HeittmannN18>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/date/date2018.html#HeittmannN18>
rdfs:seeAlso <https://doi.org/10.23919/DATE.2018.8342250>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/date>
dc:title Architecture and optimization of associative memories used for the implementation of logic functions based on nanoelectronic 1S1R cells. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document