Testable design of repeaterless low swing on-chip interconnect. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dcterms:bibliographicCitation	<http://dblp.uni-trier.de/rec/bibtex/conf/date/NaveenS16>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Dinesh_Kumar_Sharma>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/K._Naveen>
foaf:homepage	<https://ieeexplore.ieee.org/document/7459375/>
dc:identifier	DBLP conf/date/NaveenS16 (xsd:string)
dcterms:issued	2016 (xsd:gYear)
rdfs:label	Testable design of repeaterless low swing on-chip interconnect. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Dinesh_Kumar_Sharma>
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swrc:pages	563-566 (xsd:string)
dcterms:partOf	<https://dblp.l3s.de/d2r/resource/publications/conf/date/2016>
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rdfs:seeAlso	<http://dblp.uni-trier.de/db/conf/date/date2016.html#NaveenS16>
rdfs:seeAlso	<https://ieeexplore.ieee.org/document/7459375/>
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dc:title	Testable design of repeaterless low swing on-chip interconnect. (xsd:string)
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