Fast Sequential Circuit Test Generation Using High-Level and Gate-Level Techniques.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/date/RudnickVECPR98
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Fast Sequential Circuit Test Generation Using High-Level and Gate-Level Techniques.
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automatic test generation, sequential circuits, software testing, test sequence compaction
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Fast Sequential Circuit Test Generation Using High-Level and Gate-Level Techniques.
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