Low power design on algorithmic and architectural level: a case study of an HSDPA baseband digital signal processing system.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/date/SchamannHLB07
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Low power design on algorithmic and architectural level: a case study of an HSDPA baseband digital signal processing system.
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Low power design on algorithmic and architectural level: a case study of an HSDPA baseband digital signal processing system.
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