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dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jonathan_Noel_Tombs>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Luca_Sterpone>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/M._A._Aguirre>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FDATE.2008.4484702>
foaf:homepage <https://doi.org/10.1109/DATE.2008.4484702>
dc:identifier DBLP conf/date/SterponeATG08 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FDATE.2008.4484702 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
rdfs:label On the design of tunable fault tolerant circuits on SRAM-based FPGAs for safety critical applications. (xsd:string)
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foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Luca_Sterpone>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/M._A._Aguirre>
swrc:pages 336-341 (xsd:string)
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dc:title On the design of tunable fault tolerant circuits on SRAM-based FPGAs for safety critical applications. (xsd:string)
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rdf:type swrc:InProceedings
rdf:type foaf:Document