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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/date/TiriV04>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ingrid_Verbauwhede>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kris_Tiri>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FDATE.2004.1268856>
foaf:homepage <https://doi.org/10.1109/DATE.2004.1268856>
dc:identifier DBLP conf/date/TiriV04 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FDATE.2004.1268856 (xsd:string)
dcterms:issued 2004 (xsd:gYear)
rdfs:label A Logic Level Design Methodology for a Secure DPA Resistant ASIC or FPGA Implementation. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ingrid_Verbauwhede>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kris_Tiri>
swrc:pages 246-251 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/date/2004>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/date/TiriV04/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/date/TiriV04>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/date/date2004-1.html#TiriV04>
rdfs:seeAlso <https://doi.org/10.1109/DATE.2004.1268856>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/date>
dc:title A Logic Level Design Methodology for a Secure DPA Resistant ASIC or FPGA Implementation. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document